DDR3 Signal Integrity Analysis using Altium

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Hello,

Congratulations on the iMX6 Rex design it is very impressive!

I’ve recently been using Altium designer to complete my own DDR3 design with an FPGA.
I’m very interested in how you used the Altium Signal Integrity tool to verify the performance of your DDR3 design layout and determine optimal choices for things like ODT termination values, signal drive strength, etc. The tool seems difficult to set up and not well suited to a DDR3 design.

Thanks!

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Hi. Thank you. I dont simulate in Altium. If you would like to simulate DDR3 I recommend Hyperlynx. For the iMX6 there is quite good design guide – so no simulation reqired: http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf BUT, we do a lot of testing after the board is made e.g. Memory stress test running in an environmental chamber: http://www.imx6rex.com/software/memory-stress-testing-in-environmental-chamber/

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