U-Boot 2014.01 "sf probe 3:2" hangs

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I was able to boot using version 2014.01 from the USB, but then “sf probe 3:2″ fails to probe the SPI flash. Any idea why is this? Or any pointers where to look?

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Here are my changes for u-boot v2014.10 to fix the SPI flash and the network interface. I am posting the changes here in case somebody else is trying to use a newer version of u-boot. The patch is create for u-boot from
git://git.denx.de/u-boot.git
tag: v2014.10
commit: c43fd23cf619856b0763a64a6a3bcf3663058c49


diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 81dcd6e..71d0000 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -79,18 +79,11 @@ iomux_v3_cfg_t const enet_pads[] = {
    MX6_PAD_RGMII_RD2__RGMII_RD2    | MUX_PAD_CTRL(ENET_PAD_CTRL),
    MX6_PAD_RGMII_RD3__RGMII_RD3    | MUX_PAD_CTRL(ENET_PAD_CTRL),
    MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL  | MUX_PAD_CTRL(ENET_PAD_CTRL),
-   /* AR8031 PHY Reset */
-   MX6_PAD_ENET_CRS_DV__GPIO1_IO25     | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
 static void setup_iomux_enet(void)
 {
    imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-
-   /* Reset AR8031 PHY */
-   gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
-   udelay(500);
-   gpio_set_value(IMX_GPIO_NR(1, 25), 1);
 }
 
 iomux_v3_cfg_t const usdhc2_pads[] = {
@@ -134,11 +127,11 @@ iomux_v3_cfg_t const usdhc4_pads[] = {
    MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 };
 
-iomux_v3_cfg_t const ecspi1_pads[] = {
-   MX6_PAD_KEY_COL0__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
-   MX6_PAD_KEY_COL1__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
-   MX6_PAD_KEY_ROW0__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
-   MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
+static iomux_v3_cfg_t ecspi3_pads[] = {
+   MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
+   MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
+   MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
+   MX6_PAD_DISP0_DAT5__GPIO4_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
 static struct i2c_pads_info i2c_pad_info1 = {
@@ -156,7 +149,7 @@ static struct i2c_pads_info i2c_pad_info1 = {
 
 static void setup_spi(void)
 {
-   imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
+   imx_iomux_v3_setup_multiple_pads(ecspi3_pads, ARRAY_SIZE(ecspi3_pads));
 }
 
 iomux_v3_cfg_t const pcie_pads[] = {
@@ -255,35 +248,11 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-int mx6_rgmii_rework(struct phy_device *phydev)
-{
-   unsigned short val;
-
-   /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
-   val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-   val &= 0xffe3;
-   val |= 0x18;
-   phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-   /* introduce tx clock delay */
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
-   val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-   val |= 0x0100;
-   phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
-   return 0;
-}
-
 int board_phy_config(struct phy_device *phydev)
 {
-   mx6_rgmii_rework(phydev);
-
    if (phydev->drv->config)
        phydev->drv->config(phydev);
+   printf("%s, phy_id = 0x%x, addr = %d\n", __FUNCTION__, phydev->phy_id, phydev->addr);
 
    return 0;
 }
@@ -516,7 +485,7 @@ static int pfuze_init(void)
 #ifdef CONFIG_MXC_SPI
 int board_spi_cs_gpio(unsigned bus, unsigned cs)
 {
-   return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 9)) : -1;
+   return (bus == 2 && cs == 2) ? (IMX_GPIO_NR(4, 26)) : -1;
 }
 #endif
 
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index 2d93d6c..87e27a7 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -63,7 +63,7 @@
 #define IMX_FEC_BASE           ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE        RGMII
 #define CONFIG_ETHPRIME            "FEC"
-#define CONFIG_FEC_MXC_PHYADDR     1
+#define CONFIG_FEC_MXC_PHYADDR     3
 
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
@@ -71,10 +71,10 @@
 #define CONFIG_CMD_SF
 #ifdef CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
 #define CONFIG_MXC_SPI
-#define CONFIG_SF_DEFAULT_BUS      0
-#define CONFIG_SF_DEFAULT_CS       0
+#define CONFIG_SF_DEFAULT_BUS      2
+#define CONFIG_SF_DEFAULT_CS       2
 #define CONFIG_SF_DEFAULT_SPEED        20000000
 #define CONFIG_SF_DEFAULT_MODE     SPI_MODE_0
 #endif
@@ -129,6 +129,9 @@
    "console=" CONFIG_CONSOLE_DEV "" \
    "fdt_high=0xffffffff"   \
    "initrd_high=0xffffffff" \
+   "ipaddr=192.168.1.150" \
+   "serverip=192.168.1.4" \
+   "netmask=255.255.255.0" \
    "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "" \
    "mmcpart=1" \
    "mmcroot=" CONFIG_MMCROOT " rootwait rw" \

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Try to use “sf probe” only, do not use the parameters. Let me know if it helped.

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Martin, did you set flash type in include/configs/mx6sabre_common.h (or in the file which you use as default for the Rex)?

You may need to change #define CONFIG_SPI_FLASH_STMICRO to #define CONFIG_SPI_FLASH_SST and maybe adjust some other SPI settings, I do not remember exactly.

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