///--------------------------------------------------------------------------- // OpenRex - One Time Programming using Socket board Configuration // Set VDDOTP = 0 V, PWRON = HIGH, LICELL not used, VIN = 4.2 V, VDDIO = 3.3 V //--------------------------------------------------------------------------- WRITE_I2C:7F:01 // Access PF0100 EXT Page1 //[Extended Page 1 Registers: 0xA0 - 0xAF] ---------------------------------- WRITE_I2C:A0:2B // Sw1AB Voltage = 1.375 V WRITE_I2C:A1:02 // Sw1AB Sequence = 2 WRITE_I2C:A2:05 // Sw1AB Freq = 2 MHZ, Mode = Single phase WRITE_I2C:A8:2B // Sw1c Voltage = 1.375 V WRITE_I2C:A9:03 // Sw1c Sequence = 3 WRITE_I2C:AA:01 // Sw1c Freq = 2.0 MHZ WRITE_I2C:AC:72 // Sw2 Voltage = 3.30 V WRITE_I2C:AD:06 // Sw2 Sequence = 6 WRITE_I2C:AE:01 // Sw2 Freq = 2 MHZ //[Extended Page 1 Registers: 0xB0 - 0xBF] ---------------------------------- WRITE_I2C:B0:2C // Sw3A Voltage = 1.500 V WRITE_I2C:B1:04 // Sw3A Sequence = 4 WRITE_I2C:B2:05 // Sw3A Freq = 2 MHZ, Mode = Single phase WRITE_I2C:B4:2C // Sw3B Voltage = 1.500 V WRITE_I2C:B5:04 // Sw3B Sequence = 4 WRITE_I2C:B6:01 // Sw3B Freq = 2 MHZ WRITE_I2C:B8:38 // Sw4 Voltage = 1.350 V WRITE_I2C:B9:05 // Sw4 Sequence = 5 WRITE_I2C:BA:11 // Sw4 VTT Mode enable, Freq = 2 MHZ WRITE_I2C:BC:00 // Swbst Voltage = 5.0 V WRITE_I2C:BD:08 // Swbst Sequence = 8 //[Extended Page 1 Registers: 0xC0 - 0xCF] ---------------------------------- WRITE_I2C:C0:06 // Vsnvs Voltage = 3.0 V WRITE_I2C:C4:03 // VREF DDR Sequence = 3 WRITE_I2C:C8:0E // Vgen1 Voltage = 1.5 V WRITE_I2C:C9:0B // Vgen1 Sequence = 11 WRITE_I2C:CC:08 // Vgen2 Voltage = 1.2 V WRITE_I2C:CD:09 // Vgen2 Sequence = 9 //[Extended Page 1 Registers: 0xD0 - 0xDF] ---------------------------------- WRITE_I2C:D0:00 // Vgen3 Voltage = 1.8 V WRITE_I2C:D1:0A // Vgen3 Sequence = 10 WRITE_I2C:D4:07 // Vgen4 Voltage = 2.5 V WRITE_I2C:D5:07 // Vgen4 Sequence = 7 WRITE_I2C:D8:0F // Vgen5 Voltage = 3.3 V WRITE_I2C:D9:0C // Vgen5 Sequence = 12 WRITE_I2C:DC:0C // Vgen6 Voltage = 3.0 V WRITE_I2C:DD:01 // Vgen6 Sequence = 1 //[Extended Page 1 Registers: 0xE0 - 0xEF] ---------------------------------- WRITE_I2C:E0:0F // Power-up DVS = 1.5625 mV/us, SeqCLK = 4 ms, PWRON config = 0 WRITE_I2C:E1:0F // Power-up DVS = 1.5625 mV/us, SeqCLK = 4 ms, PWRON config = 0 WRITE_I2C:E2:0F // Power-up DVS = 1.5625 mV/us, SeqCLK = 4 ms, PWRON config = 0 WRITE_I2C:E8:01 // Fault Mode = Enabled //[Extended Page 1 Registers: 0xF0 - 0xFF] ---------------------------------- WRITE_I2C:FF:08 // I2C Device Address = 0x08 //=========================================================================== // ONE TIME PROGRAMMING COMMANDS FOLLOW //=========================================================================== WRITE_I2C:E4:02 // FUSE POR=1 (This Enables OTP Programming) WRITE_I2C:E5:02 // FUSE POR=1 (This Enables OTP Programming) WRITE_I2C:E6:02 // FUSE POR=1 (This Enables OTP Programming) //----------------------------------------------------------------------------------- WRITE_I2C:F0:1F // Enable ECC for fuse banks 1 to 5 by writing to OTP EN ECC0 register WRITE_I2C:F1:1F // Enable ECC for fuse banks 6 to 10 by writing to OTP EN ECC1 register WRITE_I2C:7F:02 // Access PF0100 EXT Page2 WRITE_I2C:D0:1F // Set Auto ECC for fuse banks 1 to 5 by writing to OTP AUTO ECC0 register WRITE_I2C:D1:1F // Set Auto ECC for fuse banks 6 to 10 by writing to OTP AUTO ECC1 register //----------------------------------------------------------------------------------- WRITE_I2C:F1:00 // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F2:00 // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F3:00 // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F4:00 // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F5:00 // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F6:00 // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F7:00 // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F8:00 // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F9:00 // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:FA:00 // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- VPGM:ON // Turn ON 8V SWBST //VPGM:DOWN:n //VPGM:UP:n DELAY:500 // Adds 500msec delay to allow VPGM time to ramp up //----------------------------------------------------------------------------------- // PF0100 OTP MANUAL-PROGRAMMING (BANK 1 thru 10) //----------------------------------------------------------------------------------- // BANK 1 //----------------------------------------------------------------------------------- WRITE_I2C:F1:03 // Set Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F1:0B // Set Bank 1 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F1:03 // Reset Bank 1 ANTIFUSE_EN WRITE_I2C:F1:00 // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 2 //----------------------------------------------------------------------------------- WRITE_I2C:F2:03 // Set Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F2:0B // Set Bank 2 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F2:03 // Reset Bank 2 ANTIFUSE_EN WRITE_I2C:F2:00 // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 3 //----------------------------------------------------------------------------------- WRITE_I2C:F3:03 // Set Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F3:0B // Set Bank 3 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F3:03 // Reset Bank 3 ANTIFUSE_EN WRITE_I2C:F3:00 // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 4 //----------------------------------------------------------------------------------- WRITE_I2C:F4:03 // Set Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F4:0B // Set Bank 4 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F4:03 // Reset Bank 4 ANTIFUSE_EN WRITE_I2C:F4:00 // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 5 //----------------------------------------------------------------------------------- WRITE_I2C:F5:03 // Set Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F5:0B // Set Bank 5 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F5:03 // Reset Bank 5 ANTIFUSE_EN WRITE_I2C:F5:00 // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 6 //----------------------------------------------------------------------------------- WRITE_I2C:F6:03 // Set Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F6:0B // Set Bank 6 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F6:03 // Reset Bank 6 ANTIFUSE_EN WRITE_I2C:F6:00 // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 7 //----------------------------------------------------------------------------------- WRITE_I2C:F7:03 // Set Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F7:0B // Set Bank 7 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F7:03 // Reset Bank 7 ANTIFUSE_EN WRITE_I2C:F7:00 // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 8 //----------------------------------------------------------------------------------- WRITE_I2C:F8:03 // Set Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F8:0B // Set Bank 8 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F8:03 // Reset Bank 8 ANTIFUSE_EN WRITE_I2C:F8:00 // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 9 //----------------------------------------------------------------------------------- WRITE_I2C:F9:03 // Set Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F9:0B // Set Bank 9 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F9:03 // Reset Bank 9 ANTIFUSE_EN WRITE_I2C:F9:00 // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 10 //----------------------------------------------------------------------------------- WRITE_I2C:FA:03 // Set Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:FA:0B // Set Bank 10 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:FA:03 // Reset Bank 10 ANTIFUSE_EN WRITE_I2C:FA:00 // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- WRITE_I2C:D0:00 // Clear WRITE_I2C:D1:00 // Clear //----------------------------------------------------------------------------------- VPGM:OFF // Turn off 8V SWBST DELAY:500 // Adds delay to allow VPGM to bleed off PWRON:LOW // PWRON LOW to reload new OTP data DELAY:500 PWRON:HIGH